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Actel Introduces New 4 Million-Gate FPGA Radiation-Tolerant Device For Space


Mountain View CA (SPX) Sep 07, 2005
Building on its rich heritage in the space design community, Actel Tuesday unveiled the industry's highest density radiation-tolerant field-programmable gate array (FPGA) for space designs.

The RTAX4000S expands Actel's antifuse-based RTAX-S family in order to deliver highly reliable solutions with significant advantages over competing FPGA and Radiation-Hardened (RH) ASIC devices for demanding space applications requiring high gate counts.

These include satellite payload systems, such as data processing applications in communications, and earth observation and scientific satellites. This latest member of Actel's RTAX-S family will offer four million system gates (500K ASIC gates) with an I/O count of 840 and 540 Kbits of embedded memory.

The RTAX4000S device is part of Actel's high-reliability product roadmap, also unveiled today (see separate press release entitled, "Actel Provides Path to the Future for Military and Aerospace Community with Broad Hi-Rel Product Roadmap").

"The RTAX4000S device combines unparalleled density with fast design turnaround, providing space designers with the ability to save board space and system mass without incurring RH-ASIC lead time or tooling charge penalties," said Ken O'Neill, director, military and aerospace product marketing at Actel.

"Further, because the SEU-hardened RTAX4000S device does not require customer-initiated triple module redundancy, which reduces effective gate counts by up to two thirds, Actel is able to deliver a density that far exceeds the densities offered by competing SRAM-based FPGA devices."

Compared with RH-ASIC solutions, the RTAX4000S will deliver cost and time-to-market advantages. RH-ASICs can deliver high gate counts, but they require a large up-front tooling charge that, in combination with the minimal volume requirements for many of these applications, often translates into a higher total unit cost. In addition, the lead times for RH-ASICs can be long, often making them a last resort.

Changes to the ASIC design, whether due to design error or a change in the specification, will require the customer to pay a portion of their engineering expenses again and may cause a schedule delay. With a programmable fabric, customers can take advantage of the flexibility to make design changes without impacting schedule and overall system cost.

Technology Features

The four million-gate RTAX4000S will offer the same radiation performance as existing members of Actel's RTAX-S family of FPGAs as well as the same advanced features, including embedded RAM with error detection and correction (EDAC), high I/O count and multiple I/O standard support. Other advanced features include:

    - Flip-flops that are practically immune to single-event upsets (SEUs) - Memory upsets of less than 1E-10 errors/bit-day - Single event latch-up (SEL) immunity to greater than LET(TH) 104 MeV-cm(2)/mg - Immunity to configuration upsets - Total Ionizing Dose (TID) resistance to 300 Krads (functional) - exceeding the requirement for most space applications

With the RTAX4000S, users will be able to conduct post-programming burn-in using generic burn-in boards and vectors. A packaged version of the RTAX4000S that is not flight worthy will be available so that customers may test and validate their designs using silicon with architecture, density and timing properties identical to the flight FPGAs.

Availability

Software support for the RTAX4000S is available now, and hardware prototypes are expected to be available in Q1 2006. Production quantities of the RTAX4000S are expected to be available to customers during the second half of 2006.

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